Today's IC design trend goes to large number of pin counts with transistor feature size dropped to less than 0.10um. The gate oxide is increasingly vulnerable and very susceptible to ESD damage, which can be resulted from human touch, machine handling, during the testing by automated testers or some pre charge events such as frictions by the handlers. The ultra thin gate oxide breakdown voltage has dropped to less than 5 volt and the ESD problem impose a serious threat to every single designs as well as the fabrication process house. Every year the lost in IC and semiconductor industry there is over 400 millions US dollars loss because of the ESD damages.

As a leading ESD design service company, we have expertise in the deep submicron process know hows, device physics, and 3D computer simulations of all the aspects of ESD to provide total ESD solutions to the most advanced process technology and System on Chip design.